asm { naked; AND SIL, 1; } Gets translated to and DH, 1;
As a bit more information, this is caused by a missing REX prefix, and also applies to OR, XOR, AND, ADD, SUB, and a few other instructions that use op-code 0x80 as their (I know there's a name for the set, but I can't remember it or find it anywhere :( ) I believe it is also limited to the r8, imm8 version of the op-codes.
SIL is broken beyond recognition: SHR SIL, 1; // DMD outputs SHR DH, 1 movzx CX, SIL; // movzbw CX, DH
Likely affects SPL, BPL, SIL and DIL since they all require REX.
https://github.com/D-Programming-Language/dmd/pull/4554
Commits pushed to master at https://github.com/D-Programming-Language/dmd https://github.com/D-Programming-Language/dmd/commit/c056b9dd2dfb6f03e0a3cb0c98c0c85b64dfe5d8 Fix issue 12971 - Missing REX prefix for 8 bit register access https://github.com/D-Programming-Language/dmd/commit/0bd6aad8f49221886275bc965d8bd25a0160e7a2 Merge pull request #4554 from WalterWaldron/fix12971 Fix issue 12971 - Missing REX prefix for 8 bit register access
Commits pushed to stable at https://github.com/D-Programming-Language/dmd https://github.com/D-Programming-Language/dmd/commit/c056b9dd2dfb6f03e0a3cb0c98c0c85b64dfe5d8 Fix issue 12971 - Missing REX prefix for 8 bit register access https://github.com/D-Programming-Language/dmd/commit/0bd6aad8f49221886275bc965d8bd25a0160e7a2 Merge pull request #4554 from WalterWaldron/fix12971