DMD compiles the following down to the same code for both -mcpu=avx and -mcpu=avx2. --- long4 v; v += 1; --- However this throws an illegal instruction on machines that do not have AVX2 features. The compiler should have isVectorOpSupported extended to be aware of which CPU feature implemented which vector operation.
@ibuclaw created dlang/dmd pull request #11407 "fix Issue 21040 - SIMD: illegal instruction using 32-byte operations on AVX" fixing this issue: - fix Issue 21040 - SIMD: illegal instruction using 32-byte operations on AVX https://github.com/dlang/dmd/pull/11407
dlang/dmd pull request #11407 "fix Issue 21040 - SIMD: illegal instruction using 32-byte operations on AVX" was merged into master: - 32214270e7717ace7e2f8e8ee11612065068068b by Iain Buclaw: fix Issue 21040 - SIMD: illegal instruction using 32-byte operations on AVX https://github.com/dlang/dmd/pull/11407